Theoretical combined computational rate of all the processors used by
the benchmark expressed in Tflop/s (trillion floating-point operations
per second or 10e12 flop/s). Typically, it is a product of the number
of floating-point operations per cycle, clock frequency, and the
number of processors. For the multi-core chips, a common practice is
to refer to a single core as processor. So the theoretical peak should
be multiplied by the number of cores.
The table below gives the number of floating-point operations per
cycle for common processors:
Processor | Floating-point operations per cycle |
AMD Athlon | 2 |
AMD Athlon XP | 2 |
AMD Athlon MP | 2 |
AMD Opetron | 2 |
Alpha 21164 | 2 |
Alpha 21264 | 2 |
Alpha 21264 A | 2 |
Alpha 21264 B | 2 |
Alpha 21264 C | 2 |
Alpha 21364 | 2 |
Alpha 21464 | 2 |
Cray X1 MSP | 16 |
Cray X1E | 16 |
Cray X2 | 16 |
Fujitsu SPARC64 V | 2 |
Fujitsu SPARC64 V+ | 2 |
Fujitsu SPARC64 VI | 2 |
G5 (IBM PowerPC 970) | 4 |
G5 (IBM PowerPC 970FX) | 4 |
HP PA-8500 | 4 |
HP PA-8600 | 4 |
HP PA-8700 | 4 |
HP PA-8800 | 4 |
HP PA-8900 | 4 |
IBM POWER3 | 4 |
IBM POWER4 | 4 |
IBM POWER4+ | 4 |
IBM POWER5 | 4 |
IBM POWER5+ | 4 |
IBM POWER6 | 4 |
IBM PowerPC 440 | 4 |
Intel Itanium | 4 |
Intel Itanium 2 | 4 |
Intel Pentium III | 1 |
Intel Pentium 4 | 2 |
Intel Pentium 4 Celeron | 2 |
Intel Core 2 | 4 |
Intel Core 2 Duo | 4 |
Intel Core 2 Quad | 4 |
Intel Xeon | 2 |
Intel Xeon EM64T | 2 |
Intel Xeon MP | 2 |
NEC SX-4 | 16 |
NEC SX-5 | 16 |
NEC SX-6 | 16 |
NEC SX-7 | 16 |
NEC SX-8 | 8 |
PowerPC 601 | 2 |
PowerPC 603 | 2 |
PowerPC 604 | 2 |
PowerPC 604e | 2 |
SGI MIPS 4000 | 2 |
SGI MIPS 5000 | 2 |
SGI MIPS 8000 | 2 |
SGI MIPS 10000 | 2 |
SGI MIPS 12000 | 2 |
SGI MIPS 14000 | 2 |
SGI MIPS 16000 | 2 |
SGI MIPS 18000 | 2 |
Sun UltraSPARC I | 2 |
Sun UltraSPARC II | 2 |
Sun UltraSPARC III | 2 |
Sun UltraSPARC IV | 2 |
Sun UltraSPARC IV+ | 2 |
Sun UltraSPARC V | 2 |
Sun UltraSPARC T1 (Niagra) | 2 |
Sun Rock | 2 |
|